Job Description
Talent Link by e2i is a programme to match candidates to job opportunities offered by e2i's Industry Partners. Applicable for Singaporeans and Singapore Permanent Residents only.
This job opportunity is from our Industry Partner in the Electronics sector.
Job Descriptions
Develop and review test plans
Develop verification environment/testbench in Module/IP/SOC level
Develop verification IP and reference model
Implement test with randomization based coverage driven verification methodology
Implement functional and functional/code coverage closure
Hands-on code/debug with UVM, SystemVerilog, Verilog and SystemC:
Low Power verification
Formal verification
Job Requirements
Bachelor's/Master's Degree in EEE/Computer/IC design
4-10 years verification experiences
IC/ASIC design verification experience on SOC, Ethernet, PCIe, DDR, USB, ARM CPU
Strong experience and debugging ability on SystemVerilog/UVM
Skilled in Synopsys/Cadence/Mentor Simulato...
This job opportunity is from our Industry Partner in the Electronics sector.
Job Descriptions
Develop and review test plans
Develop verification environment/testbench in Module/IP/SOC level
Develop verification IP and reference model
Implement test with randomization based coverage driven verification methodology
Implement functional and functional/code coverage closure
Hands-on code/debug with UVM, SystemVerilog, Verilog and SystemC:
Low Power verification
Formal verification
Job Requirements
Bachelor's/Master's Degree in EEE/Computer/IC design
4-10 years verification experiences
IC/ASIC design verification experience on SOC, Ethernet, PCIe, DDR, USB, ARM CPU
Strong experience and debugging ability on SystemVerilog/UVM
Skilled in Synopsys/Cadence/Mentor Simulato...
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