Job Description
Title: Systems Design Engineer (Emulation and Prototyping) - Intermediate (US)
Location: San Jose, CA (Hybrid)
Duration: 06-12 months contract with possibility of extension
Must have skills:
- FPGA Design Experience
- RTL Design using Verilog/System Verilog
- Exposure to any Emulation or Prototyping Platform (HAPS/Zebu, Protium/Palladium)
Job Duties:
In this position, the engineer will have the following key responsibilities: Hardware emulation model creation. Importing design RTL. Provide RTL patches to address non-synthesis issues. Compile emulation model. Debugging issues found during the process, bring-up, validation, and production phases of SOC programs. Perform pre-silicon verification & validation and emulation to ensure functional correctness and performance. Partition large SoC RTL for multi‑FPGA platforms; ...
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