Job Description
Job Description – Senior Synthesis Engineer (VLSI)
Worked on 7nm/5nm/Future sub-micron Technologies.
Hands on experience in Physical Synthesis with Multi corner & Multi-mode, Low Power, Performance and Area Goal using Fusion Compiler or Genus .
Hands on experience in Logic equivalence check and low power check debugging and clean up using Conformal LEC or Formality.
Familiar with pre-STA timing analysis using Primetime or Tempus.
Familiar with low power check using Conformal Low Power or VCLP tool.
Experience in verifying constraints quality and completeness.
Understanding of UPF & Low power concepts .
Familiar with functional ECO flow and implementation.
Familiar with DFT Insertion and debugging basic DFT issues.
Co-work with RTL, DFT and PD engineers to meet PPA targets.
Well versed with TCL/Perl/Shell script.
Self-starter and highly motivated.
Strong debugging, initiative and analysis/problem solving skills.
Minimum 3 + years of e...
Worked on 7nm/5nm/Future sub-micron Technologies.
Hands on experience in Physical Synthesis with Multi corner & Multi-mode, Low Power, Performance and Area Goal using Fusion Compiler or Genus .
Hands on experience in Logic equivalence check and low power check debugging and clean up using Conformal LEC or Formality.
Familiar with pre-STA timing analysis using Primetime or Tempus.
Familiar with low power check using Conformal Low Power or VCLP tool.
Experience in verifying constraints quality and completeness.
Understanding of UPF & Low power concepts .
Familiar with functional ECO flow and implementation.
Familiar with DFT Insertion and debugging basic DFT issues.
Co-work with RTL, DFT and PD engineers to meet PPA targets.
Well versed with TCL/Perl/Shell script.
Self-starter and highly motivated.
Strong debugging, initiative and analysis/problem solving skills.
Minimum 3 + years of e...
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