Staff IP Design Engineer (Functional Safety)

Job Description

A successful candidate will join a team designing and developing Lattice Foundation IP at Penang to help establish long‑term capability in IP‑level Functional Safety readiness and product robustness. The candidate will lead research, design and development of safety qualification of Foundation IP and or safety‑relevant aspects of FPGA EDA design flow, ensuring alignment with product, quality and Functional Safety requirements. The candidate is expected to work closely with cross‑functional teams to plan and execute Lattice Foundation IP release cycle including requirement analysis, feature scoping, safety impact assessment, development, testing, validation and release sign‑off.

Requirements & Skills

• Bachelors, Masters or better in Computer Science, Computer Engineering, Electrical Engineering, or related fields with 8+ years of experience in SoC and/or FPGA IP development.

Experience

• Strong communic...