Job Description
Staff Verification Engineer
We are seeking a highly skilled Verification Engineer to drive unit-level verification of complex digital IP blocks.
The ideal candidate will have deep expertise in SystemVerilog (SV), UVM methodology, and power-aware verification (UPF/CPF).
You will be responsible for ensuring design correctness, low-power compliance, and robust analog/digital interaction at the block and subsystem level.
Education And Experience
We are seeking a highly skilled Verification Engineer to drive unit-level verification of complex digital IP blocks.
The ideal candidate will have deep expertise in SystemVerilog (SV), UVM methodology, and power-aware verification (UPF/CPF).
You will be responsible for ensuring design correctness, low-power compliance, and robust analog/digital interaction at the block and subsystem level.
Education And Experience
- Bachelor's or Master's degree in Electronics or Electrical Engineering (or equivalent).
- 10-12 years of experience in block-level or unit-level functional verification with exposure to AMS and low-power design verification
- Develop UVM-based verification environments for digital IPs at the unit level.
- Create System Verilog testbenches, drivers, monitors, and scoreboards to validate functional and timing behavior.
- Define and e...
Ready to Apply?
Take the next step in your AI career. Submit your application to Arm today.
Submit Application