Job Description


Job Description

We are seeking a highly skilled Staff Digital Design Engineer to join our Memory Interface Devices (MID) Business Unit. In this role, you will lead the micro-architecture and design of high‑performance chips for next‑generation memory interface products. You will collaborate closely with cross‑functional teams—including analog/mixed‑signal, architecture, verification, and validation—to deliver robust, power‑efficient, and high‑throughput memory interface solutions.

This position is ideal for an engineer with deep expertise in DDR and LPDDR memory technologies and a strong background in complex digital logic design. 

Key Responsibilities

  • Lead RTL design and micro‑architecture development for memory interface digital blocks and subsystems.
  • Own end‑to‑end design flow: specification → microarchitecture → RTL coding → work with PnR team on timing closure → debug → release.
  • Drive design reviews, docume...

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