Staff DFT Engineer

Job Description

We are seeking a Staff DFT Engineer to own and drive the complete DFT strategy for complex SoCs from architecture through production silicon. The role requires deep hands-on expertise, strong technical judgment, and the ability to lead and mentor engineers while collaborating closely with design, PD, validation, and manufacturing teams.

The ideal candidate operates independently, makes architecture-level decisions, and is accountable for test quality, coverage, and silicon readiness.

Responsibilities

• Define chip/subsystem DFT architecture: scan, compression, LBIST, MBIST, boundary scan, test access
• Drive early RTL testability and balance coverage, test time, power, area, schedule trade-offs
• Lead scan insertion, stitching, DFT DRC closure
• Execute ATPG (stuck-at, transition, path delay), compression, ...