Sta engineer

Job Title: Static Timing Analysis (STA) Engineer
Job Overview
We are looking for a highly skilled Static Timing Analysis (STA) Engineer to join our ASIC/So C design team. The ideal candidate will be responsible for performing timing analysis, developing constraints, and driving timing closure across multiple design stages. This role requires strong technical expertise, problem-solving skills, and cross-functional collaboration.
Key Responsibilities
Perform Static Timing Analysis (setup, hold, recovery, removal) across all PVT corners and modes.
Create, refine, and validate SDC constraints including clocks, generated clocks, false paths, and multi-cycle paths.
Drive timing closure during synthesis, place & route, and final signoff.
Debug timing violations related to clocking, logic depth, routing, buffering, and cell sizing.
Work closely with RTL, Physical Design, CTS, and DFT teams to resolve timing issues.
Run STA using tools such as Synopsys Prime Time or C...