Job Description


Job Description
  • Participate in feasibility studies and sub-block/chip-level architecture definition
  • Design and integration of digital sub-blocks and chip-level implementation
  • Verification planning and Block/Top level direct testing
  • Support DFT strategy and implementation
  • Work closely with back-end designers to correctly implement digital designs to layout
  • Block/Top level LINT/CDC/RDC/STA/LEC setup and checks
  • Lab evaluation and debugging of digital blocks and full chip function
  • Support production testing, HW/SW development and device characterization
  • Tape out database and documentation preparation
  • IC design reviews, consultations and risk assessments
  • Participation in project meetings, training courses and conferences
  • Demonstrates an ability to learn new tool features and procedures

    • Qualifications
  • Master’s or Ph.D. in Electrical Engineering or related disciplines
  • ...

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