Soc verification engineer

Job Title: So C Verification Engineer (UVM)
Location: Hyderabad
Experience: 7 – 10 Years
Notice Period: Immediate / 15 Days (Max)
Job Description:
We are looking for an experienced So C Verification Engineer to join our verification team. The ideal candidate will have strong expertise in UVM-based verification , system-level So C architecture, and advanced debug skills using industry-standard EDA tools.
Key Responsibilities:
Perform So C-level verification using UVM methodology
Develop and maintain verification environments and testbenches
Debug complex So C issues using waveform and simulation tools
Work closely with design, architecture, and software teams
Verify high-speed interfaces, memory controllers, and interconnects
Support ARM-based So C boot flow verification
Mandatory Skills & Expertise:
Strong hands-on experience with UVM Verification Methodology
System Verilog for testbench development and assertions
So C-level verification ...