SoC Design Verification Engineer – Low Power / UPF

We are hiring a Low-power SoC DV Engineer with strong expertise in UPF-based verification. This role focuses on full-chip / sub-system verification, power intent validation, and advanced debugging.
Experience in full-chip SoC / sub-system verification with UPF (majority project exposure required)
Proven ability to build testbenches from scratch, including scoreboard, drivers, sequencers, checkers, and agents
Strong test planning skills driven by specifications and feature scenarios
Hands-on experience with SpyGlass for static UPF checks and dynamic power verification
Excellent debugging skills using Verdi / Verisium / SimVision
Join a team where your low-power verification expertise directly influences silicon quality and design robustness.
Best,
Karthik Kumar