Job Description

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering or equivalent practical experience.
  • 4 years of experience with verification methodology such as Universal verification methodology (UVM).
  • 2 years of experience in the verification of Intellectual Property (IP) designs such as IP, System on a Chip (SoC), vector CPUs, etc.
  • Experience with SystemVerilog, SystemVerilog Assertions (SVA), and functional coverage.

Preferred qualifications:

  • Master's degree in Electrical Engineering or a related field.
  • Experience with industry-standard simulators, revision control systems, and regression systems.
  • Experience with the full verification lifecycle.
  • Experience in Artificial Intelligence/Machine Learning (AI/ML) Accelerators or vector processing units.
  • Excellent problem solving and communication skills.

About the job...

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