Senior RTL Front-End Engineer for ASIC/SoC Design

Bitdeer is a world-leading technology company for Bitcoin mining and AI cloud based in Singapore. We are seeking an experienced RTL designer to contribute to ASIC design and tape-out readiness.

You will participate in architecture discussions, implement Verilog RTL, and collaborate with verification, synthesis, and timing teams to ensure design quality and on-time delivery. The role offers growth in a fast-moving startup culture with exposure to GPGPU/NPU/CPU module design.