Senior RTL Design

Job Title: RTL Design Engineer – Ethernet Domain
Location: Hyderabad
Experience: 5–7 Years
Notice Period: Immediate to 15 days
Job Description:
We are looking for a skilled RTL Design Engineer with strong expertise in Ethernet domain to join our team in Hyderabad.
Key Responsibilities:
Design and develop RTL modules using Verilog/VHDL.
Work on Ethernet IPs and Ethernet protocol-based designs.
Integrate and validate AXI-based interfaces.
Collaborate with cross-functional teams including verification, FPGA, and system teams.
Support FPGA-based prototyping (if applicable).
Required Skills:
5–7 years of strong RTL design experience.
Solid knowledge of Ethernet IPs / Ethernet protocol domain.
Proficiency in Verilog and/or VHDL.
Good understanding of AXI protocols.
Strong debugging and problem-solving skills.
Good communication skills and team collaboration experience.
Good to Have:
Knowledge of scripting languages such as TCL/Perl/...