Job Description

A global technology firm in Malaysia is seeking a highly skilled engineer with over 10 years of experience in hardware integration design and FPGA power modeling. The ideal candidate should have proficiency in Cadence Virtuoso and be familiar with power estimation methodologies. Your role will involve collaborating with IP designers and developing power models to enhance accuracy and improve user experience. Strong communication and scripting skills in Linux and Python are essential. Join our fast-paced, innovative team to make a significant impact in our projects.
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