Job Description

Job Description:

  • Leading DFT ATPG implementation, integration and verification of System-on-Chip (SoC) from initial specification till tapeout and production.
  • Ensure Test Coverage Goals are met at SoC Level.
  • Addressing test quality targets in DFT architecture and test pattern generation.
  • Leading various aspects of Test architecture including Scan&ATPG, and post-silicon support
  • Work with different functions like front-end design, verification and physical design to ensure production quality silicon.
  • Support post-silicon activities, working with test engineering and validation teams.

Specific Knowledge/Skills

  • Master/Bachelors Degree in Electrical/Electronic Engineering.
  • Experience of 4+ Years in DFT with successful delivery of production quality chips.
  • Senior SoC DFT engineers, with experiences in all aspects of DFT, including scan & ATPG, memory BIST,...

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