Job Description

Responsibilities
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You will join the receiving team to lead FPGA/SoC based hardware design projects, architecture definition, junior team mentoring and critical system optimization.


Functions:



  • Architecture definition
  • Coding in VHDL/Verilog
  • Advanced verification (SystemVerilog/UVM)
  • Resource optimization
  • HW/SW interfaces definition
  • Mentoring of junior engineers
  • Technical documentation

Qualifications

Hardware engineering experts with experience in FPGA development, advanced VHDL/Verilog, synthesis and verification tools (Vivado, Quartus, ModelSim, QuestaSim), modular/IP design, timing optimization, high speed interfaces, C++ or Rust, Python, GIT.


Knowledge of Process Automation, signal processing, HDL coder,...

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