Senior Design Verification Engineer

Hiring: Senior / Lead Design Verification Engineer – PCIe Gen5/6
Locations: Hyderabad / Bangalore
Experience: 6+ Years
Employment Type: Full-Time

Are you passionate about cutting-edge SoC verification and high-speed protocols? Join

Silicon Patterns

and play a key role in verifying next-generation PCIe Gen5/6 designs powering advanced wireless, IoT, and automotive applications.

Your Role & Impact
As a Senior/Lead Verification Engineer, you will:
Lead

verification planning, environment development, and test execution

for PCIe Gen5/6 protocols.
Architect and maintain robust

UVM-based testbenches

for complex SoC subsystems.
Drive

coverage-driven verification

ensuring functional, code, and assertion coverage closure.
Define comprehensive verification strategies in collaboration with architects, RTL designers, and validation teams.
Debug complex issues across:
Simulation