Job Description

Senior CPU RTL Design Engineer



_corporate_fare_ Google _place_ New Taipei, Banqiao District, New Taipei City, Taiwan



**Mid**



Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.



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**Minimum qualifications:**



+ Bachelor's degree in electrical engineering, computer engineering, computer science, a related field, or equivalent practical experience.

+ 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.

+ Experience with silicon validation and hardware debugging for phone/mobile-class application processors.

+ Experience with logic techniques and RTL static checks (e.g., Lint and CDC).


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