Senior Chip Verification Engineer (SystemVerilog/UVM)

European Tech Recruit is seeking an experienced Verification Engineer located in Gilgit-Baltistan, Pakistan. The role involves designing and building verification environments using System-Verilog and UVM for integrated circuits.

You will develop test plans, automate tests, and require strong skills in C Programming and familiarity with VHDL and Verilog. Candidates should have over 5 years of experience in the Semiconductor industry.