Job Description
Senior ASIC Design Verification Engineer, Silicon
_corporate_fare_ Google _place_ Mountain View, CA, USA
**Mid**
Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.
**Minimum qualifications:**
+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 8 years of experience verifying digital logic at the RTL level using SystemVerilog or C/C++.
+ Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
+ Experience creating and using verification components and environments in standard verification methodologies (e.g., UVM, SVA, CRV, PSS, or LPDV).
**Preferred qualifications:**
+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Co...
_corporate_fare_ Google _place_ Mountain View, CA, USA
**Mid**
Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.
**Minimum qualifications:**
+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 8 years of experience verifying digital logic at the RTL level using SystemVerilog or C/C++.
+ Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
+ Experience creating and using verification components and environments in standard verification methodologies (e.g., UVM, SVA, CRV, PSS, or LPDV).
**Preferred qualifications:**
+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Co...
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