Job Description
Job Details
Job Description:
As a RTL Design Hardware Engineer within the Software Performance and Integration group, you are expected to work on the RTL underpinning Altera's System-on-Chip integration tool, Platform Designer, FPGA Debug Environment Tools such as SignalTap and System Console. The goal of this team is to implement powerful embedded hardware systems using a straightforward flow from design creation through debugging and performance optimization. The team is responsible for development of RTL for various soft IPs, including an on-chip Memory Mapped Interconnect ( AXI/APB/AHB/Avalon) , streaming protocols IPs ( AXI / Avalon ), debug IP such as signaltap, ISSP, ISMCE, bridge and adapter IPs and supporting a full stack of tools which assemble these IPs in interesting and dynamic ways.
Responsibilities
As a Hardware Engineer in this position, you will need to be excellent at digital design...
Job Description:
As a RTL Design Hardware Engineer within the Software Performance and Integration group, you are expected to work on the RTL underpinning Altera's System-on-Chip integration tool, Platform Designer, FPGA Debug Environment Tools such as SignalTap and System Console. The goal of this team is to implement powerful embedded hardware systems using a straightforward flow from design creation through debugging and performance optimization. The team is responsible for development of RTL for various soft IPs, including an on-chip Memory Mapped Interconnect ( AXI/APB/AHB/Avalon) , streaming protocols IPs ( AXI / Avalon ), debug IP such as signaltap, ISSP, ISMCE, bridge and adapter IPs and supporting a full stack of tools which assemble these IPs in interesting and dynamic ways.
Responsibilities
As a Hardware Engineer in this position, you will need to be excellent at digital design...
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