RTL Design Engineer

Summary

This role is an exciting opportunity for a ASIC designer to contribute in a team of highly skilled design engineers within the SouthBridge IO (SBIO) team. Provide IP technical management and support for the end-to-end design development flow. This includes from architecture, microarchitecture, RTL design, design metrics (performance, power, area) analysis and design for verification strategy. Collaborate with design and verification teams to ensure a predictable IP development.

Key Responsiblities

• IP RTL design for AMDs USB IP used for all next generation server, clients, GPU and Semi-custom products.

• Work closely with IP and system architects to micro-architect cutting edge features.

• Apply low power design techniques to existing logic and maintain overall system performance.

• Focus on timing, LINT and CDC closure to ensure high quality RTL.

• Support verification and debug of the ASIC throughout var...