Job Description
Principal Engineer, RTL Design
Job Description
**SoC Architecture & Integration**
+ Lead integration of complex multi-billion transistor SoCs comprising CPUs, GPUs, NPUs, AI accelerators, memory subsystems, and high-speed peripherals.
+ Define and implement scalable SoC architectures, subsystem partitioning, and integration strategies.
+ Drive top-level RTL integration, IP assembly, and system-level design closure.
+ Collaborate with architecture, verification, physical design, DFT, firmware, and software teams throughout the development lifecycle.
**NoC & Interconnect Architecture**
+ Architect and integrate advanced Network-on-Chip (NoC) solutions for high-bandwidth and low-latency data movement.
+ Optimize traffic flows, QoS, coherency, memory access, and interconnect performance.
+ Define clocking, reset, and power strategies across complex interconnect fabrics.
**High-Speed Interfaces & Protocols**
+ Lea...
Job Description
**SoC Architecture & Integration**
+ Lead integration of complex multi-billion transistor SoCs comprising CPUs, GPUs, NPUs, AI accelerators, memory subsystems, and high-speed peripherals.
+ Define and implement scalable SoC architectures, subsystem partitioning, and integration strategies.
+ Drive top-level RTL integration, IP assembly, and system-level design closure.
+ Collaborate with architecture, verification, physical design, DFT, firmware, and software teams throughout the development lifecycle.
**NoC & Interconnect Architecture**
+ Architect and integrate advanced Network-on-Chip (NoC) solutions for high-bandwidth and low-latency data movement.
+ Optimize traffic flows, QoS, coherency, memory access, and interconnect performance.
+ Define clocking, reset, and power strategies across complex interconnect fabrics.
**High-Speed Interfaces & Protocols**
+ Lea...
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