Job Description

We are looking for an experienced Senior Architecture Leader to define and drive next-generation MCU chiplet architectures and Die-to-Die (D2 D) interface IPs. This role offers a chance to work at the intersection of system architecture, microarchitecture, and cross-functional execution.
Key Responsibilities
- Define and drive chiplet architecture optimized for MCU constraints
- Lead architecture of D2 D interface IPs (UCIe / Bunch-of-Wire)
- Collaborate closely with product and software architects
- Shape microarchitecture of IP blocks and subsystems
- Work with verification teams on test-plan development and reviews
- Collaborate with Design, Validation, DFT, Physical Design, and Emulation teams
- Support post-silicon debug and functional validation
- Drive IP selection and make/buy decisions
Qualifications & Experience
- BTech / MTech in EE / ECE / Computer Engineering / Computer Science
- 15+ years of hands-on hardware architecture experience
...

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