Principal Engineer, Design Verification Engineering

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Employer: Analog Devices, Inc.

Job Title: Principal Engineer, Design Verification Engineering

Job Requisition: 1010.1462.6 / R263318

Job Location: Austin, Texas

Job Type: Full Time

Rate of Pay: $197,600 - $250,920 per year

Duties:

Verification of digital designs and sub-systems using leading edge verification methodologies. Contribute and influence the decisions on methodologies to be adopted for the verification. Architect the testbench and develop the test infrastructure in System Verilog and UVM. Integrate the block level testbench in chip-level UVM environment and verify integration. Define test plans, tests and verification methodology for block / chip level verification. Work with the design team in generating test-plans and closure of code and functional coverage. Continuous interaction with design teams in enabling top-level chip verif...