Job Description

Job Description

  • Propose, architect, and design RTL in Verilog for use in a mixed-signal integrated circuit

  • Contribute as part of a highly experienced team of engineers with extensive cross-functional skill set

  • Apply clocking controls, FSM design, low power techniques, and high-speed design concepts

  • Participate in design, architecture, and verification reviews
  • Oversee digital backend design, including synthesis, static timing analysis, and logic equivalence checking
  • Create documentation targeting design, verification, and test teams
  • Assist with the proposal, definition, documentation, and implementation of new features
  • Mentor and train junior engineers and New College Grad engineers

Qualifications

  • Education: Bachelor or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with minimum 12+ years...

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