Job Description

About The Job

Join our team as a Physical Design Engineer and take ownership of shaping next‑generation low‑power SoCs that power tomorrow’s connected devices. In this role, you’ll work on cutting‑edge backend design flows, driving RTL‑to‑GDSII implementation and applying advanced low‑power techniques to meet stringent power and performance targets. You’ll tackle complex challenges in timing closure, signal integrity, and power optimization, collaborating with world‑class engineers and leading foundry partners to deliver high‑quality, manufacturable designs. If you’re passionate about innovation, thrive in a fast‑paced environment, and want to make a real impact on products used by millions, this is your opportunity to be at the forefront of semiconductor technology.

Key Responsibilities

  • Perform floorplanning, placement, clock tree synthesis (CTS), and routing.
  • Apply low‑power design techniques (e.g., multi‑Vt cells, power gating, clock...

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