Job Description
Hi all,
Modernize Chip Solutions is hiring for the below requirements.
Role: Physical Design Engineer
Notice Period: Immediate to 15 days
Location: BLR
Exp: 4-8 yrs
Skill:
- Hands-on experience with TSMC lower nodes
- Strong proficiency in Cadence and/or Synopsys tools
If Interested, please share your profile to my mail id [email protected]
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