Job Description
Technical Requirements
- Excellent problem-solving, leadership, and communication skills. Ability to work in a fast-paced environment and lead a cross-functional team.
- In-depth knowledge of floor planning, power planning, PNR and signoff checks
- Strong experience in static timing analysis (STA), timing closure, and signal integrity.
- Expertise in power optimization techniques, Upf, including clock gating and multi-voltage domain design
- Proficiency in physical design tools, such as Synopsys ICC2, Primetime, Calibre, Redhawk-SC
- Scripting skills in Tcl, Python, or Perl to enhance automation and streamline physical design tasks.
- Familiarity with DRC, LVS, and other physical verification processes.
Responsibilities
- Own the physical design implementation of SoC subsystems, including floor planning, placement, clock tree synthesis (CTS), routing, and optimization to meet PPA go...
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