Memory PHY RTL Design Engineer | DDR/LPDDR IPs

A leading technology company is seeking a passionate Design Engineer to join their Memory PHY team in Markham. The successful candidate will engage in RTL and firmware development for high-speed memory interfaces, requiring expertise in Verilog and SystemVerilog. This role offers the opportunity to influence next-generation computing experiences through innovation and collaboration. Candidates should possess strong analytical skills and a degree in Computer or Electrical Engineering, ready to tackle cutting-edge challenges.
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