Memory network security specialist

Memory and Networking Encryption/Macsec Focused Job Opportunity A highly skilled Staff Design Verification Engineer is required to work on Memory and Networking Encryption at sub-system and So C level for high performance high throughput flows.Develop the verification environment, reusable bus functional models, stimulus, checkers, assertions, trackers, and coverage metrics. Create verification plans and develop testbenches tailored to assigned IP/Sub-system or functional domain. The role involves partnering with Architects and RTL Design team to grasp high-level system requirements. The candidate will formulate comprehensive test and coverage plans to match the Architecture and micro-architecture. Key responsibilities include executing verification plans including design bring-up, setting up the DV environment running regressions for feature validation debugging test failures supporting post-Si bring-up debug activities tracking communicating progress in the DV process using key metr...