Job Description

Role: Memory Layout Engineer

Experience: 3 to 8 Years

Location: Bengaluru

Job Description:

  • 3-8 years of experience in Memory/Custom Layout design.
  • Memory Leafcell layout library design from scratch including top level integration.
  • Good knowledge on different types of memory architectures.
  • Good knowledge in optimized layout design for better performance.
  • Sound knowledge & hands on experience in Finfet technology, layout design and DRC limitations.
  • Proficient in physical verification flow & debug, like DRC, LVS, ERC, Boundary conditions.
  • Good Knowledge in EM and IR run and fix.
  • Proficient in Cadence Virtuoso layout editor and Calibre physical verification flow


Skills Required
LVS, ERC

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