Job Description

Analog Layout/Mask Design Engineer

Exp- 5 to 9 Yrs

Location - Bangalore

NP- 0 - 30 Days

Key Responsibilities

  • Perform analog layout design for amplifier blocks, comparators, oscillators, ADCs, bandgaps, high‑speed circuits, SRAM, and power/capacitance circuits.
  • Execute layout documentation and ensure high‑quality deliverables.
  • Deliver clean and verified DRC/LVS databases.
  • Work independently on lower‑node layout tasks with minimal supervision.
  • Collaborate with circuit and verification teams during design cycles.
  • Semiconductor Node Expertise TSMC N12 and N16, 12nm, 16nm nodes.
  • Strong exposure to 120nm, 130nm, 180nm nodes.
  • Proficiency in layout design tools: Cadence Virtuoso, GXL / MXL, Synopsys layout tools.


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