Low Power Design Verification Engineer

Low-power bugs are silent, painful, and expensive.This role exists to catch them before silicon does. If UPF is not just a checkbox for you, keep reading.

Work Desc.

- Verify SoCs and subsystems with UPF

- Create static and dynamic low-power test scenarios

- Run Spyglass for UPF checks

- Debug power-intent issues using waveform tools

- Drive low-power coverage closure

Must-Have Experience

- Strong SoC DV with UPF

- Spyglass static UPF checks experience

- Functional tests for power state transitions

- VIP, IP-only, or FPGA DV will be discounted

Cheers,

Shahid