Logic Lead

<p><b>Job Description:</b></p> <div> </div> <p>Architecture & Design</p> <ul> <li> <p>Define FPGA architecture for protocol filtering, deep packet inspection, and capture engines.</p> </li> <li> <p>Design RTL for hardware accelerators, high-speed bus interfaces, and external memory controllers.</p> </li> <li> <p>Implement demodulators and decoders for Bluetooth (LE, Classic) and proprietary protocols.</p> </li> <li> <p>Optimize FPGA resources to maximize timing closure, throughput, and clock frequencies.</p> </li> </ul> <p>Leadership & Collaboration</p> <ul> <li> <p>Lead engineers through the complete FPGA development lifecycle from concept to hardware timing closure.</p> </li> <li> <p>Collaborate closely with RF boards, software drivers, and system validation teams.<...