Job Description

Job Title - Lead RTL Design Engineer

Job Location: Bangalore/Hyderabad , India

Required Experience: Minimum 12 to 15+ Years

LanceSoft is hiring a Lead RTL Design Engineer to develop and deliver high-performance digital IP/SoC blocks.

Responsibilities

  • RTL design and micro-architecture development using SystemVerilog/Verilog
  • Perform Lint, CDC, constraint development, and timing issue resolution
  • Collaborate with verification and physical design teams for full-chip integration
  • Mentor junior engineers and drive design best practices

Required Skills

  • Strong hands-on RTL coding experience
  • Expertise in Lint, CDC, timing reports, and constraints
  • Solid understanding of ASIC/SoC design flow

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