Job Description

What You'll Be Doing

  • Creating and optimizing analog mixed signal layouts with a focus on device matching, EMIR awareness, and parasitic minimization using Custom Compiler SDL or Virtuoso XL
  • Owning top-down macro floor planning and driving layout from concept to sign-off, coordinating with circuit designers and verification teams
  • Running and resolving DRC, LVS, Antenna, DFM, and other physical verification checks, making layout choices that reduce rework later
  • Performing PERC verification for ESD and latch-up, proactively identifying and fixing risks before tape out
  • Use internal AI tools to reduce layout efforts and increase productivity
  • Collaborating with layout teams in other geographies, sharing best practices, and keeping everyone moving in the same direction
  • Documenting new methodologies and improvements in MS Word and PowerPoint, making sure the team can repeat and sca...

Ready to Apply?

Take the next step in your AI career. Submit your application to Synopsys today.

Submit Application