Layout Design Engineer

Job Role: Layout Design Engineer

Work Location : Hyderabad (WFO)

Experience: 5 to 8 Years

Budget: 20 LPA

Mode of Hire: Fulltime with OTSI

Notice Period: Immediate to 30 days (max)

Mandate Skills:

• Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support

• TSMC 3nm Exp – MANDATORY

• custom layout or analog layout with TSMC 3nm/5nm7nm/16nm Finfet & 5+ exp

Responsibilities:

• Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support.

• Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.

• Perform lay...