Job Description
Job Title: IO Layout Engineer
Experience: 3+ Years
Location: Bangalore
Employment Type: Full-time
Industry: Semiconductors / ASIC / VLSI / IO & ESD Design
Job Summary:
We are looking for a highly motivated and experienced IO Layout Engineer to join our custom layout team. The candidate will be responsible for full-custom layout of IO cells, ESD protection structures, and high-voltage interfaces for ASIC/SoC applications in deep submicron and FinFET technologies.
Key Responsibilities:
Perform transistor-level custom layout of various types of IO cells including:
Standard IOs (CMOS, LVTTL, LVCMOS, SSTL, HSTL)
High-speed and specialty IOs (DDR, USB, PCIe, HDMI, etc.)
ESD structures, pad rings, and protection circuits
Work closely with IO circuit designers to interpret schematics and design intent.
Ensure robust layout practices for:
ESD compliance
Latch-up prevention
Electromigration (EM)
Voltage isolation and guard ring planning
Experience: 3+ Years
Location: Bangalore
Employment Type: Full-time
Industry: Semiconductors / ASIC / VLSI / IO & ESD Design
Job Summary:
We are looking for a highly motivated and experienced IO Layout Engineer to join our custom layout team. The candidate will be responsible for full-custom layout of IO cells, ESD protection structures, and high-voltage interfaces for ASIC/SoC applications in deep submicron and FinFET technologies.
Key Responsibilities:
Perform transistor-level custom layout of various types of IO cells including:
Standard IOs (CMOS, LVTTL, LVCMOS, SSTL, HSTL)
High-speed and specialty IOs (DDR, USB, PCIe, HDMI, etc.)
ESD structures, pad rings, and protection circuits
Work closely with IO circuit designers to interpret schematics and design intent.
Ensure robust layout practices for:
ESD compliance
Latch-up prevention
Electromigration (EM)
Voltage isolation and guard ring planning
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