Job Description

Role: FPGA Verification Engineer
Location – Santa Clara, CA
Onsite Requirement -Yes
Number of days onsite – 5 Days
Rate:$72/Hr On C2C
Must Have Skills – FPGA Verification Engineer

Skill 1 – 8 + Years of in FPGA

Skill 2 – 5 +Years of Exp in UVM

Skill 2 – 5 +Years of Exp in System Verlilog

Job Description
We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability. You will work closely with design engineers to develop and execute verification plans, identify and debug issues, and contribute to the overall quality of our products.

Key Responsibilities

  • Develop and execute comprehensive verification plans for FPGA designs.
  • Create and maintain test benches using industry-standard verification methodologies (e.g., UVM, SystemVerilog).

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