Job Description

Job Description

YOU…

  • verify mixed-signal designs on block and system level resting upon formal and functional verification
  • interpret product requirements to create the verification concept and the product verification specification
  • perform random-constraint testbenches according to the state of the art
  • create assertions to prove the design using formal methods
  • work in collaboration with lab and test engineers, designers, system architects, and verification engineers across multiple sites

Qualifications

YOU…

  • have completed engineering degree in electrical engineering, computer science or similar studies
  • already have practical experience in the field of digital functional verification and common safety standards
  • have extensive programming skills in coding in System Verilog and System Verilog assertions
  • have good knowledge of UVM methodo...

Ready to Apply?

Take the next step in your AI career. Submit your application to ALTEN today.

Submit Application