Job Description

We are looking for a highly skilled RTL Design Engineer with 3–8 years of hands-on experience in digital design and RTL development. The ideal candidate will be responsible for micro-architecture development, RTL coding, and working closely with verification, synthesis, and physical design teams to deliver high-quality silicon.


Responsibilities

  • Develop RTL code using Verilog/SystemVerilog.
  • Perform micro-architecture design based on functional specifications.
  • Collaborate with verification team for testbench support and debug.
  • Perform lint, CDC, and synthesis checks.
  • Analyze and resolve design issues during simulation and silicon bring-up.
  • Work closely with physical design and DFT teams.
  • Participate in design reviews and documentation.


Qualifications

  • Should have 3-8 Years of experience in RTL Design.
  • Strong experience in Verilog / SystemVerilog.

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