Job Description

Primary Responsibilities

Design & Development

  • Design and develop digital logic circuits, including signal chain, clocking, fault and interrupt handlers, memory management, and FPGA integration
  • Write and maintain RTL microarchitectures and modules using Verilog, VHDL, or SystemVerilog
  • Develop constraints and synthesis scripts, and support timing closure in collaboration with the physical design team

Validation & Debugging

  • Handle Design Quality Checks including lint, CDC, and RDC
  • Support design verification (DV), test plan development, silicon debug, and root cause analysis
  • Provide design debugs and workaround support to DV and silicon validation teams
  • Sign off on waivers and review verification coverage

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