Job Description

Senior Verification Engineer Position

We are looking for a highly skilled and experienced Senior Verification Engineer to join our team. In this role, you will be responsible for ensuring the correctness and functionality of complex microprocessor architectures at the RTL level.

Job Description

The ideal candidate will have a strong background in SystemVerilog and UVM, with proven experience in block-level, subsystem, and top-level verification. Knowledge of both formal and dynamic verification methodologies is essential.

  • Masters or PhD in Computer Science, Electrical Engineering, or related field;
  • Proficiency in SystemVerilog and UVM,
  • Strong scripting skills (Python, Perl,Bash,Tcl)
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