Job Description

We are seeking an experienced DFT Engineer. The successful candidate will be responsibleof:

  • DFT implementation of Scan Logic, IJTAG, MBIST Logic, Logic BIST
  • Analysis to improve the testability of Digital design at Block and chip level.
  • Implementation of DFT logics for Digital and Mixed Signal IP.
  • Perform ATPG pattern generation including SSA /Transition/ Path Delay and IDDQ pattern.
  • Perform ATPG verification and simulation playback
  • Deliver high quality ATE patterns for production ATE testing
  • Provide test pattern support to ATE engineering team for First Proto bring up and failure analysis in the use of ATPG test and scan/debug features

Experience

  • Min 3 years of related working experience
  • Bachelor degree or equivalent in Electrical or Computer Engineering
  • Familiar with HDL design language

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