Job Description

We are looking for an experienced engineer to drive post-silicon structural test debug and pattern optimization for high-volume production devices.


Key Responsibilities:

  • Own post-silicon debug of ATPG, MBIST, and Boundary Scan patterns
  • Analyze silicon failures and drive corrective actions with ATE and design teams
  • Regenerate, validate, and release production-ready test patterns using Siemens DFT tools
  • Correlate tester data with design intent to identify coverage gaps
  • Improve yield, coverage, and overall test robustness

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