Design Verification Engineer – UVM, PCIe & AI Compute

A leading technology company in Vancouver is seeking motivated individuals for a role involving ASIC validation and digital design. The successful candidate will write test plans, develop verification environments, and ensure design quality. Ideal applicants will possess experience in System Verilog and UVM, alongside a master's or bachelor's degree. Join this innovative team to contribute to industry-leading next-generation technologies in a collaborative environment.
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