Design engineer

RTL Design Engineer
Experience : 3 years
Location : Bangalore
Familar with RTL design and Power flow.
So C Interconnect for the next generation System-on-chip (So C) for smartphones, tablets and other product categories. This position includes but no limited to:-
§Familar with Power flow for RTL design.
No C design lead part of BDC infrastructure (No C/Interconnect) core team
§ Responsible for specification, design and implementation of interconnect and related IP’s
§ Actively work with So C team, verification team, physical design team, Soc Floorplan, core teams and various other interconnect teams in various other sites
§ Partner with So C performance team ensuring Interconnect meeting all performance requirement, and with silicon validation team to co-relate pre-silicon and post silicon design assumptions
Minimum Qualifications:
§ 5+ years of solid experience in So C design
§ Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite/No C c...