Job Description
Video Codec Algorithm Modeling Engineer - Multimedia Lab
San Jose Regular R&D Job ID: J3AC2
Responsibilities
Team IntroductionOur team is building industry leading, highly efficient and scalable video codec hardware solutions (FPGA and ASIC) from the ground up to better serve our billions of users. We are looking for strong video codec algorithm modeling engineers to design algorithms and C-model for advanced video encoding and processing implemented in dedicated hardware accelerators. The successful candidate will be part of a fast growing team that includes algorithm, architecture, software, firmware, and hardware design and verification experts with a dedication to technical excellence and a passion to build large-scale and high-performing video platforms and services.Responsibilities:- Design and develop algorithms and C/C++ models for advanced video encoding and processing for hardware implementation- Support use of C/C++ models for architectural modeling and ...
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